| 摘要 |
<p>of the disclosure A multistage type amplifier circuit comprises a plurality of FETs cascade-connected to each other through interstage capacitors. The first amplifier stage of an FET is additionally provided with a feedback circuit coupled between respective gates of the first-stage FET and the next stage FET. The next amplifier stage of an FET is also provided with a similar feedback circuit coupled between respective drains of the first and next stage FETs successively connected. Thus, this makes it possible to reduce the required number of de block capacitors to less than one-half, resulting in a small area occupation of capacitors when IC is realized. Further, the amplifier circuit is configured so that each amplifier stage is not provided with a dc block capacitor in the negative feedback circuit, leading to a significant improvement in frequency characteristics of the amplifier circuit in a low frequency range.</p> |
