| 摘要 |
PURPOSE:To obtain an output video signal which has a reduced level of fluctuation of DC level and amplitude even in case whose both a clock frequency and the gain of a delay line are not linear, by using a time base correcting circuit applying an analog signal delay line, a circuit which deletes the DC fluctuation component out of the output video signal and an AGC circuit to constitute a time base corrector. CONSTITUTION:A synchronizing signal obtained by separating a video signal from an input terminal 4 via an analog variable delay line CCD5 and a synchronizing separator 6 undergoes phase comparison with a reference signal supplied from an input terminal 8 through a phase wave detector 7. The output of a phase difference signal is supplied to a voltage control oscillator 9. The frequency of the oscillator 9 is changed so that the phase difference is set at 0, and the drive clock frequency of the CCD5 is changed. The DC fluctuation component of the output of the CCD5 is deleted by a DC fluctuation component deleting circuit 2 consisting of a sample holding circuit 10 and a subtractor 11. Then a video signal having an amplitude set at a fixed lever by an AGC circuit 3 is delivered through an output terminal 15.
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