| 摘要 |
PURPOSE:To provide the detailed information of a parity error by detecting the error bit information of a corresponding microinstruction when the intermittent trouble of a microprogram is detected. CONSTITUTION:A data processor is provided with a control storage 1, a microinstruction register 2, a parity check circuit 3, an address generating circuit 4, an address register 5, a multiplexer 6, a flip flop 7, a control circuit 8, a switching circuit 9, a clock control circuit 10, the 1st and 2nd register files 11, and an operator 13. The operator 13 is commanded to execute exclusive OR between the outputs of the register file 111 and the multiplexer 12 and store the arithmetic result in a register file 112. Since a coincident bit is turned to '0' and a dissident bit is turned to '1', an illegal bit can be easily decided.
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