发明名称 MEMORY DEVICE
摘要 PURPOSE:To eliminate circuits of address decoders for random access in row and column directions by providing a cell array where cells are arranged in a matrix, and a means which shifts stored contents of the cell array in column and row directions by one cell. CONSTITUTION:In case of the access in the row direction, a row input/output buffer 12 is made operatable by a row shift control line 41 to shift stored contents of a cell array 2 in the column direction by one cell. Consequently, data is written in and read from cells of rows in one end and the other through a row data signal line 22, the buffer 12, and a data line 34. In case of the access in the column direction, a column input/output buffer 14 is made operatable by a column shift control line 42, and stored contents of the cell array 2 are shifted in the row direction by one cell. Consequently, data is written on and read from cells of columns in one end and the other through a column data signal line 24, the buffer 14, and the data line 34.
申请公布号 JPS61157953(A) 申请公布日期 1986.07.17
申请号 JP19840280439 申请日期 1984.12.28
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKI TAKESHI;AZUMA YUKIYA
分类号 G11C7/00;G06F12/00;G06T3/60 主分类号 G11C7/00
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