发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To contrive the increase in integration and the improvement in reliability by a method wherein a means of preventing the diffusion of electrons is provided around a diffused layer which is the output terminal of a substrate bias generation circuit. CONSTITUTION:The titled device is provided with a groove 6 in a substrate 1 as the means of preventing the diffusion of electrons, so that it may surround an n<+> type layer 5 which is the output terminal of the substrate bias generation circuit 4. Setting the depth of the groove 6 at a suitable value makes the groove 6 serve as a barrier against the diffusion of electrons injected out of the n<+> type layer 5 into the substrate 1. As a result, they are effectively prevented from reaching a diffused electron memory cell array region 9 in the substrate. In practical use, when the groove 6 is deepened about twice as much as the layer 5 or more than it, the diffusion of electrons can be prevented much effectively, and the distance X between the memory cell array 9 and the substrate bias generation circuit 4 can be largely reduced. Besides, the malfunction of peripheral circuits due to the diffusion of electrons from said generation circuit can be prevented.
申请公布号 JPS61156860(A) 申请公布日期 1986.07.16
申请号 JP19840276147 申请日期 1984.12.28
申请人 TOSHIBA CORP 发明人 NUMATA KENJI;OGURA ISAO
分类号 G11C11/408;H01L21/822;H01L27/04;H01L27/10;H01L27/105;H01L27/108 主分类号 G11C11/408
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