发明名称 FRAME SYNCHRONIZATION SYSTEM
摘要 PURPOSE:To economize the titled system by aligning framehead signals by the frame aligning part at the end of the transmission line, then removing the synchronizing circuit for each state frame from the transmit interface part furnished in the transmittal connecting line in the exchange station. CONSTITUTION:A read counter 44 causes a frame aligning circuit 33, by the time signal CLK in the exchange, to synchronize the outputs of the frame, and directs an MF synchronizing circuit 46 to take in the status signal (ST-) of each frame. The MF synchronizing circuit 46 synchronizes multiframes (MF) under the informing by the read counter 44, and likewise takes in the state signal (ST-) of each frame that is ordered in the prescribed position from the transmit signal on a link 15, as well as temporarily stores the signal in a buffer memory circuit 48, then transmits to the controlling part via a signal line ST. Therefore, the circuitry conventionally provided to take out each signal in the state frame in matching with the order of the controlling actions of the exchanger and output to the buffer memory circuit, is made unnecessary. In such a way, the state signal is taken out only by synchronizing the multiframes. As a result, the transmit interface part of the exchanger is economized.
申请公布号 JPS61156939(A) 申请公布日期 1986.07.16
申请号 JP19840277406 申请日期 1984.12.27
申请人 NEC CORP;TOKYO ELECTRIC POWER CO INC:THE;FUJITSU LTD 发明人 MINATO DAISAKU;TOGOSHI TOSHIRO;ITABASHI TOSHIO;NAKAMURA KOUZOU;SEKIGUCHI ISAMU
分类号 H04J3/06;H04J3/12;H04L7/00;H04L7/08 主分类号 H04J3/06
代理机构 代理人
主权项
地址