| 摘要 |
PURPOSE:To improve the high-speed and high-frequency characteristics with a large degree of freedom in design of the titled device, by a method wherein the first semiconductor layer of high purity or P-type, second semiconductor layer of small electron affinity, third semiconductor layer with increasing electron affinity, and fourth semiconductor layer with almost equal electron affinity are successively laminated on a high-resistant substrate. CONSTITUTION:The titled device is composed of the first semiconductor layer 12 of high purity or P-type, second semiconductor layer 13 having a smaller electron affinity than the semiconductor layer 12 and an N-type, high impurity concentration, third semiconductor layer 14 with increasing electron affinity and at least partly doped with an N-type impurity, and fourth semiconductor layer 15 non-doped with almost equal electron affinity. Then, the surface electron density of an electron channel is controlled by the total donor density of the second semiconductor layer impurity-doped to N-type and the third semiconductor layer, and the gate input capacitance is controlled by the total thickness of the third semiconductor layer of high purity and the fourth semiconductor layer. |
