| 摘要 |
PURPOSE:To accept evenly starts given from all CPUs by suppressing the restart to the CPU that accepted a start last and attaining the acceptance of the start of the corresponding CPU when the start given from a certain CPU is rejected. CONSTITUTION:A flip-flop 7 is kept reset by a busy signal 10 of the CPU1 when a command is executed by the start given from the CPU1. If the start is given from a CPU2 under such conditions, an AND gate 11 is turned on by the AND conditions between the positive phase output of the flip-flop 7 and the start signal of the CPU2. Then a flip-flop 8 is set and a state where an I/O controller is in use is reported to the CPU2. When the command of the CPU1 is over, an external memory controller reports this end of command to the CPU1 and resets the flip-flop 7. In this case, a flip-flop 9 is also set and therefore a start sequence has no actuation even though the start is given from the CPU1.
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