| 摘要 |
PURPOSE:To eliminate jitter components and to decrease the number of pins and external parts with the IC conversion of a vertical synchronizing separator circuit, by detecting the count value of an up-down counter and comparing this count value with the prescribed value for detection of a vertical synchronizing position. CONSTITUTION:A clock input terminal 6 is connected to an input terminal at the other side of an AND circuit 4, and the output terminal of the circuit 4 is connected to a clock terminal CK of an up-down counter 7 of a 4-bit structure. At the same time, a terminal 1 is connected to an up-down count switch terminal R of the counter 7. The output terminal of a NAND circuit 5 is connected to a reset input terminal R of the counter 7, and output terminals Q0-Q3 of the counter 7 are connected to a count value coincidence detecting circuit 8. An output terminal Q3 of the highest bit of the counter 7 is connected to a clock input terminal of a D.FF2 as well as an input terminal at the other side of a NAND circuit 3. A reset terminal R of a D.FF10 is connected to the output terminal of the circuit 8 via an amplifier circuit 9. Then a reverse output terminal -Q of the D.FF10 is connected to a D input terminal of a D.FF11.
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