| 摘要 |
PURPOSE:To obtain a CMOS device having high reliability by a method wherein a first resist mask is formed onto an Si substrate, impurity ions are implanted, an insulating film is shaped through heat treatment, a second resist mask according to the same pattern is formed and the ions of a second impurity are implanted. CONSTITUTION:Si 32 on sapphire 31 is removed through etching in predetermined thickness by an Si3N4 34 mask, P ions are implanted by using a first resist mask 35, B ions are implanted by a second resist mask, oxide films 36 are shaped while employing Si3N4 34 as masks, and Si 32 is separate into Si layers 32a, 32b. Resist masks 37, 39 are formed in succession, and ions are implanted to shape deep N<-> layer 38 and P<-> layer 40 in the layers 32a, 32b. Gate oxide films 41a, 41b are shaped, shallow P<-> layer 42 and N<-> layer 43 are formed through ion implantation by using resist masks, and a CMOS device is completed through a normal method. There is no gate oxide film on deep ion implantation, and the gate oxide films are not deteriorated on shallow ion implantation. Accordingly, the variation of Vth and the lowering of gm can be inhibited, and a latch-up is also prevented, thus acquiring the device having high reliability. |
