发明名称 ACCELERATION AND DECELERATION CIRCUIT FOR NC MACHINE
摘要 PURPOSE:To eliminate sudden change in acceleration/deceleration of the titled circuit and to suppress vibration by setting a high-order address of an object speed storage section in response to the highest speed setting data and setting a numeral of each address in response to the highest speed. CONSTITUTION:An output pulse of an oscillator 1 is accessed by a counter 2, the pulse is frequency-divider by a frequency divider 4 in response to an output of a ROM3 deciding the acceleration, integrated by a counter 5, becomes a speed in response to the speed to decide the frequency dividing ratio of a frequency divider 6, then a drive pulse in response to the drive speed of motor is outputted from a gate circuit 7. When the speed of the output of the counter 5 is coincident with the content of a ROM8a accessed by the counter 2 and it is detected by a comparator 9, the counter 9 counts up and the mode moves to the next speed mode. The high-order address of the ROM8a is changed by the highest speed data set in response to the final moving distance in a register 11.
申请公布号 JPS61150011(A) 申请公布日期 1986.07.08
申请号 JP19840271790 申请日期 1984.12.25
申请人 HITACHI SEIKO LTD 发明人 YOKOYAMA AKIRA;DOBASHI CHUKEI
分类号 G05B19/416;(IPC1-7):G05B19/407 主分类号 G05B19/416
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