发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To test frequency characteristics precisely even when an operation frequency exceeds the frequency limit of a tester by using a circuit whose speed is highest and a delay circuit formed by connecting plural circuits of the same kinds in series. CONSTITUTION:A semiconductor circuit 12 operates with a system clock from a pin 11 and a test circuit 13 is formed on the same chip with a main circuit 12 and has a critical pulse circuit 123, the delay circuit formed by connecting (n) circuits of the same kind in series, and a D flip-flop circuit 132. The operation frequency of this test circuit 13 is checked by monitoring whether the level of the Q output of the D flip-flop circuit 132 is inverted every time the system clock, thereby checking the operation frequency of the main circuit 12. The operation frequency of this test circuit 13 is reduced to 1/n time as high as the operation frequency of the main circuit 12, so the frequency can be checked sufficiently even by a conventional tester.
申请公布号 JPS61149871(A) 申请公布日期 1986.07.08
申请号 JP19840272223 申请日期 1984.12.24
申请人 TOSHIBA CORP 发明人 YAMAGUCHI KAZUO
分类号 G01R31/28;H01L21/66 主分类号 G01R31/28
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