发明名称 |
Bias circuit with voltage and temperature compensation for an emitter coupled logic circuit |
摘要 |
A bias circuit for providing a reference voltage to an output circuit, for example, an ECL circuit in an LSI. The bias circuit is able to operate at a lower power supply voltage of about -2 V and includes a first transistor having an emitter which is connected to a power supply and a base and a collector commonly connected through an impedance circuit to ground. The bias circuit is also connected to the output circuit, whereby heat generation in the LSI is decreased.
|
申请公布号 |
US4599521(A) |
申请公布日期 |
1986.07.08 |
申请号 |
US19820453113 |
申请日期 |
1982.12.27 |
申请人 |
FUJITSU LIMITED |
发明人 |
KANAI, YASUNORI;SUGIYAMA, EIJI;NAWATA, KAZUMASA |
分类号 |
G05F3/22;H03K19/086;(IPC1-7):H03K19/003;H03K19/092;H03K19/098 |
主分类号 |
G05F3/22 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|