| 摘要 |
A signal detection circuit suitable for a radio paging receiver is described. In the circuit, a carrier wave modulated with a code having n bits, where n is an integer not less than 2, is received and demodulated. The demodu-lated output is written in an n-stage shift register, where n is an integer not less than 2, in response to a clock pulse of frequency fs. The n output stages of the shift register are scanned sequentially in response to a scan signal of frequency nfs. It is determined whether or not the signals present on the output stages coincide with bits of a predetermined code. In summary, the present invention is successful in detecting a desired signal even if the beginning or head end of the received signal is unknown, because all the bits of the received signal wirtten in a shift register are compared with the desired signal during the interval between two successive times of writing received signals in the shift register. This can be accomplished with negligible additional circuit and, therefore, with quite a simple circuit arrangement. Additionally, the present invention promotes a practical increase in the number of available channels because it permits different calling codes assigned to different SC signals. |
