| 摘要 |
PURPOSE:To use a balance/unbalance converting circuit even when an input signal is not held by controlling an electric charge charged in an integration capacitor by an input signal so as to be depending on the input signal at a specific point of time during a clock period in the said circuit. CONSTITUTION:When the level of a clock pulse phi1 is at 'H', an input capacitor 105 is given to an input terminal 10 of an integration circuit 30 with reset. On the other hand, the input signal is charged in the input capacitor 104 while the clock phi1 is at 'H', and the signal at the trailing point of the clock phi1 is stored until a clock pulse phi2 goes to 'H'. When the clock phi2 is at 'H', the capacitor 104 is discharged through an input terminal 9. Thus, the value of the input signal at the trailing of the phi1 is stored and outputted over the period from the leading of the phi2 to the leading to the phi1 between signal output terminals 11 and 12.
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