| 摘要 |
PURPOSE:To make a DMA controller highly functional by transferring a series of data groups, which are held in a certain address space with offsets, to another address space with offsets. CONSTITUTION:Transfer information of a memory start address A, a device start address B, a memory-side offset value X, a device-side offset value Y, a number (n) of transfer words, etc. are registered in a table, and the start address and the number of transfer blocks of this table are set to registers BAR and BTC by an MPU. The DMA controller refers to the table indicated by the address set to the register BAR to read start addresses A and B, offset values X and Y, and the number (n) of transfer words of the first block into registers marked with *, and thereafter block transfer is started.
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