发明名称 PROGRAMMABLE DELAY CIRCUIT
摘要 PURPOSE:To change a delay time and a signal width without changing the circuit by using a delay circuit possible for programming the delay time and the signal width. CONSTITUTION:A unit signal generating circuit 5 receiving an output of a program command circuit 4 generated to program optionally the delay time and the output signal width generates a unit signal US. After the unit signal US is corrected by a correction circuit 6, the result is inputted to a relative value generating circuit 8. The circuit 8 receives an output of the circuit 4 to set the outputted delay time and signal width according to the relative value with a basic clock CKS. Then delay output signal generating circuits 101-104 to which the output of the circuits 4, 8 is applied generates a delay signal. Thus, the delay time and signal width are changed without changing the circuit.
申请公布号 JPS61148914(A) 申请公布日期 1986.07.07
申请号 JP19840270669 申请日期 1984.12.24
申请人 NEC CORP 发明人 EJIRI MASAHARU
分类号 H03K5/135 主分类号 H03K5/135
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