发明名称 ANALOG DELAY CIRCUIT
摘要 PURPOSE:To apply delay with a low distortion factor with high resolution by passing an analog signal through a path of pulse FM modulation, a delay circuit comprising a CMOS and a pulse FM demodulator. CONSTITUTION:The analog signal shown in figure (a) is inputted from an input terminal 49. The signal is subject to pulse FM modulation by an FM modulation circuit 50 and demodulated into a signal having a frequency in response to a voltage level shown in figure (b). An output signal of the circuit 50 is delayed by a delay circuit 68 as shown in figure (c). The delay signal is subject to pulse FM demodulation by an FM demodulation circuit 84 and a delayed analog signal as shown in figure (d) is outputted from an output terminal 98. The delay time T is varied by a control voltage Vc3. since each inverter is controlled by control voltages Vc1, Vc2 so that the delay time T is immune to fluctuation of temperature and power supply voltage, the signal is delayed stably and accurately.
申请公布号 JPS61147614(A) 申请公布日期 1986.07.05
申请号 JP19840270431 申请日期 1984.12.21
申请人 NIPPON GAKKI SEIZO KK 发明人 TOMIZAWA TOSHIO
分类号 G11B20/10;G11B20/22;H03H11/26;H03K3/03;H03K5/00;H03K5/13;H03K7/06;H03K7/08 主分类号 G11B20/10
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