发明名称 HIGHLY EFFICIENT CODE DECODING DEVICE
摘要 PURPOSE:To reduce the effect of error transmission, by forming an expected addition code from, for example, the average value of addition codes of eight blocks placed up and down, and right and left of the block concerned, and by replacing this expected addition code with the error addition code when such error code is received. CONSTITUTION:The addition code, namely the minimum level MIN and dynamic range DR, is supplied to an error correction circuit 83 where transmission error is corrected. An error modification circuit 84 is connected to the error correction circuit 83. The error modification circuit 84 makes and adjustment to the addition code which has not been corrected according to the error flag issued from the correction circuit 83. The addition code outputted from the error modification circuit 84 and the encoded code DT which is time-adjusted by a delay circuit 87 are supplied to a decoder 85. The code DT is decoded by the decoder 85, and the original picture element data PD is outputted from an output terminal of the decoder 85.
申请公布号 JPS61147690(A) 申请公布日期 1986.07.05
申请号 JP19840269867 申请日期 1984.12.21
申请人 SONY CORP 发明人 KONDO TETSUJIRO
分类号 H03M7/30;H04N7/24;H04N19/00;H04N19/50 主分类号 H03M7/30
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