发明名称
摘要 PURPOSE:To prevent the rise in substrate potential when it is in an open state, by a method wherein a resistance element is connected between a semiconductor substrate and a grounding terminal in a condition to be arranged parallel to a P-N connection formed on a substrate. CONSTITUTION:Thick oxidized films 17-19 for interelement separation are formed on a type P Si substrate 1, and N<+> regions 2 and 3 are formed on the substrate 1 surrounded with the films 17 and 18. An electrode 13 is mounted through the medium of a gate oxidation film 9 between the regions 2 and 3 to form an MIS transistor Q1. Type N<+> regions 4-6 are formed also between the films 10 and 18, and a transistor Q3 consists of the regions 4 and 5 and a gate electrode 14 formed through the medium of a gate oxidation film 10. A transistor Q4 consists of the regions 5 and 6 and a gate electrode 15 formed through the medium of a gate oxidation film 11, and the region below the film 18 is used as a transistor Q2. With this a type N resistance element 28 of about 1kOMEGA is formed at the end of the substrate 1, and opposite ends thereof are connected to the regions 3, 6 and the substrate 1.
申请公布号 JPS6129153(B2) 申请公布日期 1986.07.04
申请号 JP19800099662 申请日期 1980.07.21
申请人 NIPPON ELECTRIC CO 发明人 KITAMURA YOSHINARI
分类号 H02H7/20;H01L21/822;H01L27/02;H01L27/04;H01L27/06;H01L29/78 主分类号 H02H7/20
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