| 摘要 |
PURPOSE:To decrease the number of an interruption report lines between a CPU and an external device and to execute the floating interruption by installing a signal line communicating the presence and absence of the interruption and a memory means which can read and write between CPUs. CONSTITUTION:CPU1 and 2 are connected by a signal line 12 to communicate the presence and absence of the interruption mutually, and memory means 9 is used for exchanging the data between both CPU. When the interruption factor occurs in an external device 3, the factor is reported through a signal line 10 to CPU1. The CPU1 holds an interruption factor at an interruption factor holding register 15, an interruption factor flag of the area corresponding to the device 3 of an interruption information storing area 17 in the memory means 9 is '1' and the interruption information is stored. Further, the CPU1 informs the CPU2 that the interruption factor occurs through the signal line 12. The CPU2 reads the area 17 of the device 9, and sets a corresponding interruption factor register. Thus, while the floating interruption execution, the interruption can be executed by decreasing the interruption report line between the CPU and the external device. |
