发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To form a good polycrystalline silicon structure of selfaligned two- layer having less size difference between the upper and lower polycrystalline silicon layer patterns by the selfalignment etching to the polycrystalline silicon film of lower layer with the polycrystalline silicon of upper layer having completed the heat process used as the mask. CONSTITUTION:The polycrystalline silicon layer 5 of the upper layer is etched with the photoresist layer 6 having the target pattern on the two-layered polycrystalline silicon layer 5 structure used as the mask, the photoresist is removed and the heat processing is carried out for 10min to 120min under the nitrogen gas ambience at 1,050 deg.C to 1,100 deg.C. Next, an oxide film 4 is removed, and polycrystalline silicon layer 3 of the lower layer is processed by the ordinary etching method with the variant polycrystalline silicon layer 5' used as the mask. Since the polycrystalline silicon layer of upper layer shows an etching rate about one tenth that of the silicon layer of lower layer, it is scarcely etched and the initial pattern size is kept and after processing of the polycrystalline silicon of lower layer, the self-alignment structure of good two- layered polycrystalline silicon layer can be realized.
申请公布号 JPS61145844(A) 申请公布日期 1986.07.03
申请号 JP19840269812 申请日期 1984.12.20
申请人 MATSUSHITA ELECTRONICS CORP 发明人 NAKAMURA SHIGEAKI;SHIMURA YASUO
分类号 H01L23/52;H01L21/3205;H01L21/8246;H01L21/8247;H01L27/10;H01L27/112;H01L29/78;H01L29/788;H01L29/792 主分类号 H01L23/52
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