发明名称 CHANNEL BUFFER CONTROL SYSTEM
摘要 PURPOSE:To improve a throughput of a channel processor and to prevent the overrunning by checking the key and simultaneously preheating in a main memory access from the channel. CONSTITUTION:When a fetching access is executed from a channel processor, the data of an operation code, an address, etc., are set to a channel address register 40. When the fetching access needs a key checking, the request of the key checking is performed through a tag reading register 42 to a key access control circuit, and the fetching address is set at a prefetching port 46. Thus, the prefetching is executed, and the operation after key checking is completed almost without the waiting time. In such a way, since the prefetching is executed in parallel to the execution of the key checking, the throughput of the channel processor is improved, and with regard to this, the overrunning of the channel processor can be prevented.
申请公布号 JPS61145668(A) 申请公布日期 1986.07.03
申请号 JP19840268090 申请日期 1984.12.18
申请人 FUJITSU LTD 发明人 KURIBAYASHI NOBUHIKO;CHIBA TAKASHI
分类号 G06F12/14;G06F13/12;(IPC1-7):G06F13/12 主分类号 G06F12/14
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