| 摘要 |
PURPOSE:To attain the automatic generation of a test data pattern with no special external input of the test data, by providing a memory and a test pattern generating/decoding circuit for said memory and performing the logical processing of the lowest head signal and a control signal for generation of a test pattern. CONSTITUTION:The control signal supplied to a test pattern generating circuit 2 from an external terminal CNT is set at a low level. Thus the signals of high levels obtained by inverting the control signals of low levels are supplied to AND gates 23 and 25 respectively. While the control signals of low levels are supplied directly to AND gates 24 and 26. As a result, the outputs of a pair of AND gates 23 and 24 are set at low levels. Then the output of an OR gate 27 is also set at a low level, and a signal of a low level is supplied to a data input terminal i00 of a RAM1. For the next pair of AND gates 25 and 26, the output of the gate 25 is set at a high level. Thus the output of an OR gate 28 is also set at a high level. Then a signal of a high level is supplied to a data input terminal i01 of the RAM1. |
