| 摘要 |
PURPOSE:To omit a capacitor for a power-on reset, and to execute easily an integration by comparing an output of a frequency dividing counter and a set value, and loading the set value to the frequency dividing counter immediately, when said output is out of an operation range. CONSTITUTION:At a stationary time, an output value of a counter 1 is always larger than a value of a set value supplying circuit 3. The counter 1 increases from a set value which has been loaded by an up-counter. Accordingly, an output of a comparing circuit 2 is always '1', the counter 1 executes counting to the end, and when a carrier has been outputted, an AND gate 5 outputs '0', loads the set value, and repeats counting again. Also, a frequency dividing output is outputted from an output terminal 6. When turning on a power source, sometimes the output of the counter 1 is smaller than the set value, but since the output of the comparing circuit 2 becomes '0', the AND gate 5 outputs '0' immediately, and initializing is executed immediately. |
