发明名称 TIMER DEVICE
摘要 PURPOSE:To improve the economy and reliability by improving an automatic supervisory circuit of a timer so as to prevent the increase in the number of confirming times attended with the number of timers to be checked. CONSTITUTION:In inputting a check input signal 1 to a check input terminal TC1, a digital timer T1 and a confirming timer Tx give logical 1 at their output terminals after a prescribed time and the timing of the Tx is set to a momentary position, its output causes logical 1 and gives it to the input terminal of an AND1 momentarily. Since logical 1 is inputted by a NOT to the other input of the AND1 until the setting time comes by the timer T1, the output of the AND1 is logical 1 to set an F/F and gives logical 1 to the input of an AND2. When the output terminal of the timer T1 gives logical 1 after the setting time of the timer T1, the input level of the AND1 via the NOT is logical 0 to release the set input of the F/F, logical 1 is given to the other input of the AND2, the output of the AND2 goes to logical 1, an OP being a check result confirming output gives logical 1, and the result of check is discriminated as 'good'. This is similar when the check input signal 1 is given to a check input terminal TCn.
申请公布号 JPS61144922(A) 申请公布日期 1986.07.02
申请号 JP19840266354 申请日期 1984.12.19
申请人 TOSHIBA CORP 发明人 NIINUMA SHIGERU
分类号 G04F3/00;H03K17/28 主分类号 G04F3/00
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