| 摘要 |
PURPOSE:To decrease distortion of a generated AC signal by providing an auxiliary means changing the pulse width of a clock fed to a shift register to shift it and dividing equally a waveform of an AC signal in the level direction so as to form the waveform. CONSTITUTION:The auxiliary counter 11 counting a reset signal RS1 is provided to change dynamically the count by a frequency division counter 21 in a stepwise frequency division. The count set to a reset circuit 22 is changed in order as m1...mn every time the reset signal RS1 is outputted in response to the content of the counter 11. Further, the reset circuit 22 references the most significant bit of, e.g., the counter 11, compares the signal in the order of counts m1...mn, then conversely compares the signals in the order of mn...m1. Then a sinusoidal wave signal Vout is outputted by applying D/A converting to a bit pattern of a shift register 4 by a D/A converter 5.
|
