| 摘要 |
PURPOSE:.To decrease the number of externally mounted components by applying large scale circuit integration to a logical section, forming a noise preventing circuit with a logical circuit and incorporating the circuit in the inside of the LIS. CONSTITUTION:When a signal is at an H level, a reset pulse generating circuit is in the scan mode, input signals of a-1-a-4 are propagated as they are in an incrementer 3, inputted to a holding circuit, where the signals are held by a CLK signal. An input signal (c) is given to a reset switch of a circuit 2 and a reset pulse generating circuit is transited to the load mode with the signal at an L level. The incrementer 3 is not operated and an output signal of the control circuit 2 is stored as it is in a holding circuit 4. The state is kept until the input to the control circuit is changed. When the signal (c) goes to H by the operation of an external switch 1, the count mode is attained, the incrementer 3 is operated and a data incremented by 1 is stored in the holding circuit 4 together with the output of the control circuit 2. The count-up is repeated sequentially in the count mode by the same procedure. |
