| 摘要 |
PURPOSE:To obtain a circuit suitable for circuit integration by writing sequentially each input signal to each memory cell, selecting altogether wordlines of all memories cells after the end of write of all input signals to change the storage content of the memory cells and extracting the output after the change in the internal state of all the memory cells is stable so as to realize the circuit with less number of circuit elements even when many inputs are used. CONSTITUTION:The titled circuit consists of memory cells SEL0-SEL4 connected in common to bit lines BIT and BIT', a write circuit to each memory cell, a read circuit 2 and a control circuit 3 controlling the operating timing of the titled circuit. Then a binary counter 6 makes count by using a clock phi1, a decoder 5 outputs a decode output by using outputs Q0-Q2 and input signals A-E and then the control circuit 3 applies various control signals.
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