| 摘要 |
PURPOSE:To reduce junction capacitance, and to improve element performance such as the speedup of the operation of an element by increasing the concentration only of a semiconductor substrate region in the vicinity of a source region. CONSTITUTION:A field oxide film (an element isolation region) 22 is formed to the surface of a P<-> type silicon substrate 21, and a gate electrode 25 is shaped into an element region 23 in the substrate 21 surrounded by the field oxide film 22. A first resist pattern 26 coating the element region 23 on the source region side and a field oxide film 24 is formed, arsenic ions are implanted into the element region 23, and silicon ions are implanted in depth deeper than arsenic into the element region 23. The first resist pattern 26 is peeled, and boron ions are implanted selectively into the element region 23 containing one part of a source region 27. A second resist pattern 30 is peeled, boron in an ion implantation layer 31 is diffused rapidly to a damage region 29 through annealing and spread to the lower section of the source region 27, and a P type impurity region 32 surrounding the source region 27 is shaped. |
