ERROR CORRECTING AND DETECTING SYSTEM

摘要

PURPOSE:To use a general encoding and decoding LSI to constitute encoding and decoding circuits for information different in data length. CONSTITUTION:A parity matrix (a) consists of only column vectors different in odd weight for the purpose of satisfying conditions of SEC-DED. Each of rows S0-S3 of individual partial matrixes M00-M03 consists of any of matrixes X1-X4 obtained by substituting cyclically individual rows of a 4X4 matrix in the column direction by 1-4 bits. When a bXb matrix is denoted as Xg and the error pattern of an error of >=3 odd bits in the b-bit block is denoted as E0 and the error pattern of an error of >=4 even bits in the b-bit block is denoted as Ee, the matrix Xg satisfying a condition (1) that the weight of each column vector of the Xg is 1 or 2 and a condition (2) that the weight of Xg.E0 is >=3 and a condition (3) that the weight of Xg.Ee is not 0 is included in each partial matrix corresponding said block, thereby satisfying conditions of SbED.