发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To make memory and dummy cells large enough, and to set the value of the dummy cell half the value of the memory cell with high controllability, by utilizing both side walls of a trench part as the memory cell, and only one of both walls of the trench as the dummy cell. CONSTITUTION:An MoSi2 conductor layer 25 is formed on the surface of a substrate 21 by extension in a required direction so as to cross a pair of N<+> type regions 22, 23 via thin Si oxide film 24. A pair of these regions 22, 23 correspond to the source and drain of a selecting transistor 4. A groove 26 having a W width, D depth, and L length is formed, and its surface is covered with an oxide film 28. The capacitor of the groove 26 is formed at the side wall and the bottom. In a dummy cell, the capacitor is formed only one one of the side walls of a groove 26' formed at the same time with the groove 26, and the distance l3 holds the relation l3=l1+l2+L'', contriving to adjust the capacitance.
申请公布号 JPS61140167(A) 申请公布日期 1986.06.27
申请号 JP19840262201 申请日期 1984.12.12
申请人 TOSHIBA CORP 发明人 SATO MASAYUKI
分类号 H01L27/10;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 H01L27/10
代理机构 代理人
主权项
地址