发明名称 DEGLITCHER CIRCUIT OF D/A CONVERTER
摘要 PURPOSE:To eliminate influences of glitch in an output terminal to improve the S/N by providing an analog switch in the output of a D/A converter and switching the rise part of output data to a specific potential for every sampling. CONSTITUTION:A glitch control signal DEG is allowed to fall in a part of existence of this glitch, namely, at the moment of the change of data and is held in the low level for a time corresponding to a specific pulse width delta and is set to the high level again thereafter. An analog switch 3 is turned on when the glitch control signal DEG is in the high level and is opened when the signal DEG is in the low level, and an analog switch 4 is operated in the opposite manner; and when data rises, the signal DEG is in the low level, and the analog switch 3 is opened, and the analog switch 4 is turned on, and zero potential is generated in the output terminal. After the time delta, the signal DEG is set to the high level, and the analog switch 3 is turned on, and the analog switch 4 is opened, and the output of a D/A converter 2 is generated in the output terminal.
申请公布号 JPS61139123(A) 申请公布日期 1986.06.26
申请号 JP19840261433 申请日期 1984.12.10
申请人 SEIKO INSTR & ELECTRONICS LTD 发明人 SHIBATA KOICHI;FUKUICHI TAKURO;ISHIKAWA TAKEHIRO;SASA TAKESHI
分类号 H03M1/08 主分类号 H03M1/08
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