发明名称 FINE PROCESSING METHOD FOR SEMICONDUCTOR
摘要 PURPOSE:To execute fine process to Si substrate by using a second external power supply which can sufficiently absorb leakage current of the p-n-junction. CONSTITUTION:An Si substrate having the Pt electrode 5, p-layer 4 and n-layer 3 is immersed into the KOH aqueous solution 2 and a positive potential is applied to the substrate for the potential of liquid from the power supplies 6, 7. When a current flows to the KOH aqueous solution from the Si substrate, an SiOx is formed at the surface and SiOx is also etched by the KOH aqueous solution. When SiOx is formed quicker than the etching rate, the Si substrate becomes passive owing to the SiOx. When a voltage higher than the voltage between the solution and substrate (passive voltage) or less than such voltage is applied from the power supplies 6, 7, the p-layer 4 is selectively etched, leaving the n-layer 3. This method is effective in the range where a forward current does not flow even in the forward bias. Moreover, there is no limitation in concentration (n-layer 3) in the leaving side because of the two power supplies system, a degree of freedom of selective etching is remarkably wide and complicated and accurate fine process can be realized.
申请公布号 JPS61137330(A) 申请公布日期 1986.06.25
申请号 JP19840260296 申请日期 1984.12.10
申请人 YOKOGAWA ELECTRIC CORP 发明人 IKEDA KYOICHI;ISOZAKI KATSUMI;WATANABE TETSUYA
分类号 H01L21/3063;H01L21/306;(IPC1-7):H01L21/306 主分类号 H01L21/3063
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