发明名称 PROCESSING DRIVING CIRCUIT FOR OUTPUT SIGNAL OF CHARGE COUPLED DEVICE
摘要 PURPOSE:To obtain proper timing pulses without any influence of the delay time of an amplifier by detecting and delaying a specific signal in the output signal of a charge coupled device, and thus generating a driving signal for a processing circuit which processes the output signal of the charge coupled device. CONSTITUTION:An output signal (a) amplified by an AMP2 is sent to the output signal processing circuit 12 and a reset detection part 13. This reset detection part 13 generates a reset pulse and the delay time is set by delay circuits 14 and 15 so that the reset pulse is outputted with timing signals PHICP and PHISH. This clock signal is used for the clamping and sample holding of the output signal processing circuit 12; timing signals for clamping and sample holding are not obtained from a clock of CCD and a common generator like a conventional output signal processing circuit and an output signal circuit obtains timing pulses independently.
申请公布号 JPS61137460(A) 申请公布日期 1986.06.25
申请号 JP19840260353 申请日期 1984.12.10
申请人 NEC CORP 发明人 TOGASHI AKIRA
分类号 H04N1/19;G06K9/20;G06T1/00;H04N1/04 主分类号 H04N1/19
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