发明名称 Frequency doubler with fifty percent duty cycle output signal
摘要 A unique frequency doubler circuit is utilized which requires only a handful of standard components such as operational amplifier, logic gates, resistors, capacitors and switches. In contrast to certain prior art frequency doublers, frequency doublers constructed in accordance with the teachings of this invention do not require the use of a phase lock loop, thereby resulting in a substantial simplification of circuit construction. Furthermore, frequency doublers constructed in accordance with this invention utilize a feedback technique which assures that the duty cycle of the output signal will be 50%, or any other predefined value.
申请公布号 US4596954(A) 申请公布日期 1986.06.24
申请号 US19840584656 申请日期 1984.02.29
申请人 AMERICAN MICROSYSTEMS, INC. 发明人 HAQUE, YUSUF A.
分类号 H03K5/00;H03K5/156;(IPC1-7):H03B19/10;H03B5/20 主分类号 H03K5/00
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