| 摘要 |
<p>PURPOSE:To decrease the power consumption of a system where plural processing programs are carried out just with a single microprocessor, by securing an automatic switch to a basic clock which is slow enough to satisfy the requested performance when a processing program which suffices for a low speed is carried out. CONSTITUTION:A clock signal e0 on a signal line 10 produced from a clock oscillation circuit 4 is supplied to a dividing circuit 5. Then clock signals e1-en of (n) types of frequencies (n: integer) are delivered from the circuit 5. The signal e1 has the highest speed for actuation of this microcomputer system; while the signal e- has the lowest speed. When an instruction is delivered from a microprocessor 1, the state of this instruction is set to a clock selection register 7 by a data bus signal (a) on a signal line 14 and a clock selection register set instruction signal (g) on a signal line 13 decoded by an instruction decoder 8.</p> |
