发明名称 SINGLE CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To prevent an overhead due to the bus conflict by incorporating plural CPUs and providing the internal and external address data buses to each CPU independently. CONSTITUTION:A CPU 100 gives accesses to an internal memory 103 and an internal I/O interface 104 via an internal address data bus 114. At the same time, the CPU 100 also gives the accesses to an external memory 105 and an external I/O interface 106 via the bus 114 and an internal address data bus 121 connected to each other by a bus controller 102 and an external address data bus 113 connected via a buffer 111. the controller 102 connects the bus 114 and an internal address data bus 120 to the bus 121 or an internal address data bus 122. Then the controller 102 sets the holding signal lines 115 and 119 at high levels respectively and holds the CPU 100 and CPU 101 respectively.</p>
申请公布号 JPS61136159(A) 申请公布日期 1986.06.24
申请号 JP19840258712 申请日期 1984.12.07
申请人 NEC CORP 发明人 OKAMOTO WATARU
分类号 G06F15/167;G06F13/28;G06F15/17;G06F15/78 主分类号 G06F15/167
代理机构 代理人
主权项
地址