| 摘要 |
PURPOSE:To synchronize a processing system operated by a synchronizing type counter and a processing system operated by a clock signal generator, by starting the counting of the synchronizing type counter by the first clock generated by the clock signal generator. CONSTITUTION:A pulse generator PG is triggered by an input, sends out a pulse output of 'L' to a D type flip-flop FF and a reset terminal of a cock signal generator CO for a prescribed period, and sets an output of the D type flip-flop FF and an output of the clock signal generator CO to 'L' and 'H', respectively. A synchronizing type counter SC goes to a reset state by the output of the D type flip-flop FF. When the prescribed period elapses, the output of the pulse generator goes to 'H', the output of the clock signal generator CO falls and goes to 'L', and thereafter, a clock is outputted. By a rise of the first clock, the output of the D type flip-flop FF goes to 'H', and the synchronizing type counter SC starts a counting operation.
|
