CIRCUIT FOR RESTRICTING DEVIATION BETWEEN LOGICAL VOLTAGES AND LOGICAL CIRCUIT WITH DEVIATION RESTRICTOR,申请号JP19850272360-传众专利搜索

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发明名称	CIRCUIT FOR RESTRICTING DEVIATION BETWEEN LOGICAL VOLTAGES AND LOGICAL CIRCUIT WITH DEVIATION RESTRICTOR
摘要
申请公布号	JPS61136319(A)	申请公布日期	1986.06.24
申请号	JP19850272360	申请日期	1985.12.03
申请人	THOMSON CSF	发明人	GUU TAN FUAN
分类号	H03K19/017;H03K19/0952	主分类号	H03K19/017
代理机构		代理人
主权项
地址

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