发明名称 SEMICONDUCTOR TESTER
摘要 PURPOSE:To reduce the capacitance of a memory area holding a truth table and the dummy time for the execution of instruction, by writing the execution of instruction and the results of operation in a proper internal code from which a semiconductor to be tested has in specialized external memory area. CONSTITUTION:With a switch block SW OFF, a clock waveform group C is applied based on input information from a memory area 6 with a clock generator 4 and an execution instruction group is machine coded to be memorized into an internal instruction part at a specialized memory area 7. Then, when a device 1 to be tested is connected to the specialized area 7 with the switch block SW ON, it functions and acts according to the instruction group written into the specialized memory area 7 and machine coded and output signals are stored sequentially into a data section of the specialized memory area 7. Thereafter, the information stored into the data section of the specialized memory area 7 is compared with the output expected value memorized in the memory area 6 by a comparator 5 to judge the coincidence or noncoincidence therebetween.
申请公布号 JPS61133873(A) 申请公布日期 1986.06.21
申请号 JP19840255951 申请日期 1984.12.03
申请人 MITSUBISHI ELECTRIC CORP 发明人 TADA TETSUO;MATSUI HIDEO
分类号 G01R31/28;G01R31/3193;G06F11/273 主分类号 G01R31/28
代理机构 代理人
主权项
地址