发明名称 FAULT PROCESSING SYSTEM OF ELECTRONIC COMPUTER SYSTEM
摘要 PURPOSE:To automate a series of processing by providing firmware referencing a table specifying an operation at fault given in advance when a waiting state of interruption inhibition is detected to attain energizing of an alarm device, collection of faulty information, load of initial program of system and interruption of power and to detect effectively the queuing state of interruption due to fault. CONSTITUTION:The fault processing system detects the queuing state of interruption inhibition and applies recovery processing according to the table specifying the operation at fault given in advance by the operating system. When the queuing state of interruption inhibition is set, a control register A9 is reference at first, and when a bit A is logical 1, the start address of a control table 12 of a main storage device 8 is obtained from a control register B10, a queuing state code given in the progem state word 11 is used as an index to obtain a control entry corresponding to the code. Further, a bit S of a control register A9 is referenced to obtain the operation command from the entry to the present automatic processing mode.
申请公布号 JPS61133443(A) 申请公布日期 1986.06.20
申请号 JP19840255387 申请日期 1984.12.03
申请人 MITSUBISHI ELECTRIC CORP 发明人 TSUTAKI FUMIO;NAKANISHI MICHIO
分类号 G06F11/00;G06F11/07 主分类号 G06F11/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利