发明名称 LAMINATION COMPLEMENTARY DYNAMIC SHIFT REGISTER
摘要 PURPOSE:To improve the integration density and the production yield by using a vertical output line of the (m-1)-th step inverter in common as a vertical line of the same step and a vertical input line of the next m-th step. CONSTITUTION:A pair of MOSFETs TL1 and TU1, and a pair of TL2 and TU2 compose effectively 2-layer construction complementary inverter of m-th step and (m-1)-th step. A pair of TL3 and TU3 forms effectively 2-layer construction complementary switch, to which pulses p, -p are impressed. Similarly, pulses -p, p are impressed to a pair of TL4 and TU4. A vertical output line 23c which connects a lower layer output line 23a and an upper layer output line 23b of (m-1)-th step inverter is the output line of the (m-1)th inverter, and transmits an output signal of (m-1)-th inverter to an input lines 14a, 14b of the m-th step inverter when the TU4 and TL4 are closed by the pulses p and -p. In this way, the number of the vertical lines necessary for composing one step of inverter and a switch becomes only one, and the area factor (integration density) and the yield at the time of production will be enhanced.
申请公布号 JPS61133095(A) 申请公布日期 1986.06.20
申请号 JP19840253516 申请日期 1984.11.30
申请人 NEC CORP 发明人 ENOMOTO TADAYOSHI;YASUMOTO MASAAKI
分类号 G11C11/401;G11C11/34;G11C19/28;H01L21/8234;H01L21/8238;H01L27/08;H01L27/088;H01L27/092 主分类号 G11C11/401
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