发明名称 MANUFACTURE OF IC
摘要 A multilayer circuit and a method for manufacturing it and its electrical connections are proposed, which arrangement is essentially designed as three layers and comprises a first, double-sided, metallised carrier element (10), a second, single-sided, metallised carrier element (20) and an insulation layer (30) arranged between them. Conductor paths (31 to 37) are etched out of the metal coating on the intermediate layer (B), after which the elements (10, 20, 30) are pressed together into a structural unit and first holes (1', 3'', 4', 6'', 7') are subsequently drilled, at predetermined points originating from a component-fitment plane (A) with a first hole-data set and, in the case of a structural unit used on the surface side, originating from a lower plane (C), are drilled with second holes (2', 3'', 5', 6'') at predetermined points from a second, mirror-image hole-data set. After metallisation of all the holes, contact and conductor surfaces (22 to 28) are manufactured on the component-fitment plane (A), and corresponding conductor paths (13 to 18) are manufactured on the lower plane (C). <IMAGE>
申请公布号 JPS61131598(A) 申请公布日期 1986.06.19
申请号 JP19850256833 申请日期 1985.11.18
申请人 CONTRAVES AG 发明人 YOOZEFU ERUZENERU
分类号 H05K1/00;H05K3/00;H05K3/46 主分类号 H05K1/00
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