| 摘要 |
PURPOSE:To reduce access time to a buffer memory by starting access to all ways not in access at the same time between the detection of a hit way. CONSTITUTION:When a hit WAY is in use by a preceding access. a comparator 36 outputs a coincidence signal. Thus, buffer address register BAR 38,41 and buffer memory ways BMWAY 37,40 continue the accessing so far. Then the access to the hit BMWAY is awaited until the access of any WAY is finished When the access of one WAY is finished, a bit of a WAY of an accessing wait register (AWR) 35 is reset, a comparator 36 compares the content of a high way register HWR 34 with the content of the AWR 35 to discriminate again when the bit WAY is in use. When in use, the procedure is awaited until the access of a preceding address as to the hit WAY is finished.
|
