| 摘要 |
PURPOSE:To suppress the increase of a circuit scale to the minimum and improve the calculating speed of an adder circuit for calculating the complementary number of a contracted cardinal number, by doubling carry foreseeing circuits and eliminating the closed loop of an end-around carrying mechanism. CONSTITUTION:An adder circuit 10 for calculating the complenentary number of a contracted cardianl number which inputs an addend 51 and augend 50 has two doubled carry foreseeing circuits 20 and 21 which are driven by a carry implementing signal 60. The 1st carry foreseeing circuit 20 has a fixed carry input 61 of '0' to the lowest order and the 2nd circuit 21 always has a carry input of '1' to the lowest order. When a carry is produced from the highest order 70 of the 1st circuit 20, a selection circuit 30 selects the highest- order carry output 71 of the 2nd circuit 21 and uses the output 71 as the carry input 73 of the adder 10. In other cases, the output of the 1st carry foreseeing circuit 20 is used as the carry input 73. |
