| 摘要 |
PURPOSE:To detect a code error with a simple circuit by generating a pulse from a storage means when an input signal has an error in the code rules in the synchronization establishing state. CONSTITUTION:A signal (a) comprising an mB1C code is inputted to an EX-OR circuit 2 together with a signal (b) while being delayed by 2 bits at a delay circuit 1, the dissidence of them is detected to generate a signal (c). This is a signal outputting '1' at each (m+1)-th bit when no code error exists. A frequency divider 3 applies 1/(m+1) frequency division to a clock (d) having a bit period to produce a signal (e). A flip=flop 4 receives the signal (c) at the data input D and the signal (e) at the clock input C and produces an output signal (f) of '1' level continuously when the synchronization is established and no code error exists. If any code error exists, however, one pulse of '0' level is generated and it is used as an error signal to detect the error. |
