| 摘要 |
PURPOSE:To produce the title device of high quality which enables high-speed action and inhibits short channel effects, the variation in threshold voltage, and the like, by a method wherein the upper layer part of a gate electrode containing an impurity different from the proper impurity formed at the upper layer part of the gate electrode is partly removed. CONSTITUTION:A well 25 is formed on a P type Si substrate 21, and field oxide films 28 are provided. After formation gate oxide films 29, an undoped polycrystalline Si layer is deposited over the whole surface and formed into a P<+> polycrystalline Si layer 30 by B<+> ion implantation. Next, the layer 30 is patterned into electrodes 31, 32, and N<+> type ion-implanted layers 34, 35 are formed by As<+> implantation to the substrate 21. After As<+> implantation to the surface part 36 of the elctrode 32 on the N-channel side, P<+> type ion layers 38, 39 are formed by B ion implantation to the N-channel side. The surface part 36 is etched away, and the ion-implanted elements are electrically activated, thus forming P type source and drain regions 40 and 41 in the well 25, and N<+> type source and drain regions 42 and 43 in the substrate 21 on the N-channel side. Then, P- and N-channel transistors Tp, TN are provided. |
