发明名称 AUTOMATIC LOGIC DESIGN SYSTEM
摘要 PURPOSE:To execute logic design automatically by a computer by uniformly assigning control FFs for controlling the status of a main data structure necessary for the execution of a prescribed function, collecting the ON/OFF conditions of the FFs and developing the collected conditions like a table. CONSTITUTION:A logic formation part 140 inputs a structure description table (data structure description) 200 and an operation description table (data flow description) 300 to execute the following processing. Namely, an operation editing table 400 is formed by editing the contents of the table 300. Then, a control FF table 500 assigning the control FFs to the register is formed on the basis of the contents of the tables 200, 400. Subsequently, a control signal table 600 assigning inherent control signals to registers, memories etc. registered in the table 200 is formed. A list of control logics is formed as a control logic table 700. Thus, the control logic is automatically formed from information indicating the flow of data between data structures and the number of designing processes in a logic design state can be reduced.
申请公布号 JPS61128374(A) 申请公布日期 1986.06.16
申请号 JP19840249559 申请日期 1984.11.28
申请人 HITACHI LTD 发明人 SHIMIZU TSUGUO;KAWASAKI YUMIKO
分类号 G06F17/50 主分类号 G06F17/50
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