| 摘要 |
PURPOSE:To perform processing having many repetitions of an optional step number by attaining control to reset a start address with no delay when the last one of a series of instructions is detected. CONSTITUTION:The instruction of an (n-2) address is executed and the repeating frequency 2, for example, is set to a repeating counter 5 in a cycle where a program counter 1 shows (n-1). Then the numerical value '1' which is less than the step number '2' of a series of instructions is set to both a step counter 7 and a step register 9 in a cycle where the counter 1 shows an (n) address. Then the counter 7 is decreased to '0' as soon as the counter 1 is increased to show an (n+1) address. Thus the final step of a series of instructions is detected. The counter 5 is decreased down to '1'. The instruction of the (n) address is fetched again in the next cycle. These said cycles are repeated until the counter 5 is set at '0'.
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